• 4路同步模擬輸入，24-bit分辨率，另有1路速度計輸入

• 可直接連接全橋、半橋電路類型傳感器

• 1/4橋類型傳感器需要在外部接入一個橋路電阻

• 直接電壓信號量程為±250mV

• 內部電橋激勵為0-10V，編程選擇

• 每通道編程可選100 kΩ ±0.1%分流電阻

• TEDS (IEEE 1451.4) sensor class II compatible

• 軟件可標定橋路偏置和增益

• 采樣頻率為52.734 kHz

• 可編程觸發方式（軟件觸發、外部數字觸發、數字閥值觸發）開啟模擬輸入操作

• 同步總線(RJ45)用于擴展連接到4個DT9838或者DT9837x系列模塊

• 支持VIBpoint軟件，支持VC/C++, Matlab, labView 以及其他分析測試軟件

Transducer Support

In addition to strain gages, the DT9838 supports a variety of transducer types, including load cells, pressure transducers, and torque sensors that are based on the Wheatstone bridge.

A load cell, which consists of a number of strain gages, measures load and force by determining the deformation of a structural member as a load or force is applied. Pressure transducers, which consist of strain gages mounted on a diaphragm, measure the deformation of the diaphragm that is proportional to the pressure that is applied. Torque sensors, which consist of strain gages mounted on a torsion bar, measure the shear stress as the torsion bar turns that is proportional to the torque.

To use these transducers, configure the analog input channel for a full-bridge configuration. These transducers typically use 350 Ω nominal bridge resistance.

Instead of supplying a gage factor, use software to enter the sensitivity of the unit provided by the manufacturer of the transducer. For example, a load cell rated for 100 pounds with a 2 mV/V output has a full-scale output of 20 mV when using 10 V of excitation. Some transducers also support TEDS or virtual TEDS. The DT9838 provides TEDS support to interface to these transducers directly.

TEDS

Each analog input channel on the DT9838 module provides a Class II TEDS (Transducer Electronic Data Sheet) interface through the RJ50 connector. The interface consists of twowires (TEDS DATA and TEDS RETURN).

TEDS is supported by some load-cells and other sensors; it is not used with strain gages.

Input Resolution

The value that is measured across the bridge of an analog input channel on the DT9838 module is amplified and applied to the 24-bit Sigma-Delta analog-to-digital converter (ADC). The ADC oversamples the incoming signal, filters the values, and produces a result.

The resolution of the analog input subsystem is fixed at 24 bits.

Input Range

The default full-scale input range for each channel is ±250 mV.

A/D Sample Clock

The ADC master clock is generated by an internal programmable PLL and allows user programmable ADC sample rates from 195.3 S/s to 52734 S/s.

訂貨型號

硬件

• DT9838

• DT9838-OEM

配件

• EP386

• EP394

• EP398

• STP STRAIN

• STP STRAIN 120

• STP STRAIN 350

軟件

The following software is available for purchase separately:

• VIBpoint Framework

免費軟件

The following software is available as a free download from our website:

• DAQ Adaptor for MATLAB

• LV-Link

相關型號

DT9829